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Parallel array
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151	Microsoft Word - VLDB09_SIMD-Scan_Camera_Ready Add to Reading List Source URL: www.vldb.org Language: English - Date: 2009-07-27 10:29:02 Computer programming X86 instructions SIMD Streaming SIMD Extensions SSE4 Bit array Vectorization 128-bit SWAR Computing Computer architecture Parallel computing
152	Functional High Performance Financial IT The Hiperfit? Research Center in Copenhagen – Project Paper – Jost Berthold1 , Andrzej Filinski1 , Fritz Henglein1 , Ken Friis Larsen1 , Mogens Steffensen2 , and Brian Vinter3 Add to Reading List Source URL: hiperfit.dk Language: English Programming paradigms Functional languages Parallel computing Array programming languages Models of computation NESL Haskell Parallel programming model Declarative programming Computing Software engineering Computer programming
153	sixRAID 12bay SCSI 320 TO SATA RAID Architecture RAID Management Add to Reading List Source URL: www.mikerohard.de Language: English - Date: 2004-12-10 11:03:20 Serial ATA SCSI RAID Disk array controller Parallel ATA Power Architecture Host adapter Serial attached SCSI Computer hardware Computing Computer storage
154	1. INTRODUCTION OM19X is a dot matrix impact printer that is available in 24 column, OM190, and 40 column, OM192, models. It is compact and reliable with a variety of features and options suitable for a wide array of app Add to Reading List Source URL: www.omniprintinc.com Language: English - Date: 2013-01-25 19:42:34 Printer Centronics Parallel port D-subminiature RS-232 Dot matrix printer ImageWriter Computer hardware Computer buses Computing
155	Reconfigurable Data Processing for Clouds Anil Madhavapeddy Computer Laboratory University of Cambridge 15 JJ Thomson Avenue, Cambridge [removed] Add to Reading List Source URL: anil.recoil.org Language: English - Date: 2013-09-29 14:14:18 Electronic engineering Reconfigurable computing Models of computation Parallel computing Field-programmable gate array MapReduce Stream processing Cloud computing Heterogeneous computing Computing Computer architecture Concurrent computing
156	PARALLEL PROGRAMMING MANY-CORE COMPUTING: THE LOFAR SOFTWARE TELESCOPE[removed]Rob van Nieuwpoort Vrije Universiteit Amsterdam & Astron, the Netherlands Institute for Radio Astronomy Add to Reading List Source URL: www.cs.vu.nl Language: English - Date: 2014-02-11 08:17:19 LOFAR Square Kilometre Array Westerbork Synthesis Radio Telescope Australian Square Kilometre Array Pathfinder Telescope Dwingeloo Array MeerKAT Dwingeloo Radio Observatory Radio telescopes Astronomy ASTRON
157	Are Your Passwords Safe: Energy-Efficient Bcrypt Cracking with Low-Cost Parallel Hardware Katja Malvoni (kmalvoni at openwall.com) Add to Reading List Source URL: www.openwall.com Language: English - Date: 2014-08-19 09:20:20 Cryptographic software System software Instruction set architectures Password Crypt John the Ripper ARM architecture Central processing unit Field-programmable gate array Software Computer architecture Bcrypt
158	Are Your Passwords Safe: Energy-Efficient Bcrypt Cracking with Low-Cost Parallel Hardware Katja Malvoni [removed] University of Zagreb, Croatia Add to Reading List Source URL: www.openwall.com Language: English - Date: 2014-07-23 00:08:16 Electronics Bcrypt Cryptographic software Computer architecture Crypt Multi-core processor John the Ripper Brute-force attack Field-programmable gate array Cryptography Computing GPGPU
159	Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Rona Add to Reading List Source URL: sirius.clarity-lab.org Language: English - Date: 2015-04-15 00:10:25 Graphics hardware Video cards GPGPU Sirius Satellite Radio Speech recognition Parallel computing Latency CUDA Field-programmable gate array Computer hardware Computational linguistics Computing
160	The PIG Paradigm: The Design and Use of a Massively Parallel Fine Grained Self-Reconfigurable Infinitely Scalable Architecture From Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Copyright© 1999 IEEE N Add to Reading List Source URL: www.cellmatrix.com Language: English - Date: 1999-11-23 00:24:11 Electronics Field-programmable gate array Reconfigurable computing Logic gates Evolvable hardware Flip-flop Multiplexer Parallel computing Electronic engineering Digital electronics Electronic design

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